Modern Communication Principle & Technology Experimental System

It adopts two complex programmable logic devices, with functions of graph input and HDL input. Clock signal sources and analog signal sources on this equipment can be configured for different experiments. And there are 24 experiments items such as stopwatch, frequency meter, QPSK, cyclic code (15, 6), codec, conventional code (2, 1, 6),digital communication and so on.

power switch: power swithc for power on/off. The power supply for this system is 220V.

DC power supplies: ±5V DC power supplies, red indicator lamp5V, green-5V, blue indicator lamp—download clock flow, orange indicator lamp—download signal flow.

clock signal: there are three kinds of clock signal: frequency within 3.2M~0.2K in eleven ranges and generated by CD4060 and crystal oscillator (3.2768MHz); two-way 17MHz asynchronous clocks generated by 74HC04 and crystal oscillator (16.9344MHz); 6MHz clock generated by crystal oscillator and program. Pay much attention to the position of switchews when using these three clocks.

  • audio signal generator: 600Hz/1KHz audio signal generated by circuit constructed by LM324 and other components are used for frequency modulation or A/D conversion. Pay much attention to the position of power switch, amplitude potentiometer and frequency select switch.
  • CPLD1: used for generating PCM clock, flaming pulse, pseudo-random code and HDB3 code, NRN signal of PLL 1 and frequency dividing and generating of two-way double throw switching signal. And it is also the encoding circuit of one/four digital LED display.
  • PCM: integrated package MT8965 is adopted for PCM encoding/decoding.
  • HDB3: the left is the circuit for HDB3 code generating and outputting and unipolar/bipolar converting circuits are constructed by 74LS126 and line transformer; the middle is the HDB3 code inputting circuit and the unipolar/bipolar converting circuits are constructed by SN75107, then the signal is output to CPLD2 for decoding; the right is also the HDB3 code generating and outputting circuit for HDB3 encoding of NRZ output from CPLD2 to check the code error.
  • PLL 1: it is used for carrying out basic PLL experiments and phase-locked frequency synthesis, such as FM, FSK modulation, extraction of bit synchronous signal and so on.
  • PLL 2: it is used for demodulation of FM and FSK signals from PLL 1, also, the extraction of bit synchronous signal.
  • CPLD 2: the functions are frequency dividing of PLL 2, communication with PC serial interface, HDB3 error code checking and also it is the encoding circuit of double four-digit LED display.
  • CPLD 3: demultiplexer of digital mulplex system, it also can be used for other experiments.

  • clock signal circuit
  • 8421BCD code and pulse counting experiment
  • Design of digital stop watch
  • pseudo-random code generator
  • two-way double throw analog switch
  • HDB3 encoding circuit
  • Synchronous signal extracted by narrow-band filtering
  • HDB3 decoding circuit
  • 2DPSK modulation/demodulation
  • four-phase differential encoding/decoding
  • principle of QPSK modulation
  • digital frequency meter
  • FSK modulator (1)
  • FSK demodulator
  • FSK modulator (2)
  • PCM transmitter time squence and frame structure
  • PCM encoding/decoding
  • data multiplex system
  • Synchronous signal extracted by digital phase locking technique
  • Synchronous signal extracted by analog phase locking technique
  • scrambling and descrambling
  • encoding and decoding of cyclic code (15, 6)
  • encoding and decoding of convolutional code (2, 1, 6)
  • PC serial interface communication